TSMC Readies 8x Reticle Super Carrier Interposer For Next-Gen Chips Twice as Large As Today’s
TSMC is no stranger to building big chips. Besides the ~800mm2 reticle limit of their normal logic processes, the company already produces even larger chips by fitting multiple dies on to a single silicon interposer, using their chip-on-wafer-on-substrate (CoWoS) technology.… Read More »TSMC Readies 8x Reticle Super Carrier Interposer For Next-Gen Chips Twice as Large As Today’s